Experimental Base Bias Tuned VFO
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Introduction
You will find the word "popcorn" mentioned frequently on this web site. To me, popcorn connotes simplicity, frugalness and utility. I wanted to develop a popcorn VFO that new builders would not feel intimidated by. Preferably, it would have no variable capacitors or varactors to purchase and use parts that are readily available in catalogs.
In VFO experiments last year I found that the base bias of a bipolar transistor configured as an oscillator affected the frequency and stability of the oscillator. In general, an increase in bias voltage causes the oscillator to increase in frequency and visa versa.
The purpose of the experiments on this web page were to see if changing the bias voltage on a bipolar junction transistor (BJT) oscillator could be used as the main tuning element for a VFO.
Whenever building a VFO, it is usually best to build the oscillator without the variable tuning components added to see if it works as designed and whether or not it is frequency stable. If you are unable to build a VFO that is stable on only 1 frequency, you will likely have an even harder time stabilizing it as a true variable frequency oscillator. With this in mind, I built the circuit below and tested it with my DVM, oscilloscope and frequency counter.
Above schematic. A common base Colpitt's oscillator which oscillated at ~ 6.9 MHz. If you remove the 27 pF capacitor connected to the collector, the frequency increases to ~7.3 MHz. The common base topology has become my favorite when working with bipolar transistors and especially local oscillators. I also used EMRFD 4.10 as a reference for these experiments. The Q1 circuit has great utility and I have built versions from 1 to 54 MHz. The buffer is a Darlington pair with a low impedance output.
Photograph: An "ugly" breadboard of the above circuit. The LED serves to alert me that I have the circuit powered up.
On this prototype oscillator, most of the capacitors that can alter the oscillating frequency were C0G multilayer ceramic caps purchased from Digi-Key. I used 3 NP0 ceramic capacitors as well. The 0.1 uF capacitors that used where just junk box ceramic types.
Prototype schematic: Variable tuning components are added to the circuit above. In order to prevent Q1 from going into cutoff when the bias voltage from the tuning potentiometer was 0 (turned all the way to the left), the Q1 voltage divider bias network was kept (but modified.) The 5K6 resistor was chosen to provide a base bias voltage of 0.69 VDC when the tuning pot is all the way to the left. The next highest standard resistor I had on hand was an 8K2. When I tried this resistor, the Q1 bias voltage was < 0.5 VDC and Q1 was cutoff; therefore the 5K6 was chosen. You also need to choose bias resistor values to prevent Q1 from going into saturation as the tuning potentiometer is turned to the right and the bias voltage is increased.
Photograph to the right: The tuning components are added. I no longer use zener diodes as voltage regulators in my VFO circuits. The 3 pin, fixed voltage regulator results in less frequency drift than zener diode counterparts from my experiments. The LM78L05 voltage regulator uses a TO-92 case and is in the foreground. Component lead lengths were a little excessive, but I do this in my prototypes, so I can reuse the parts in later experiments to reduce costs.
Photograph to the right: The functioning bread board can be seen on top of the notebook used to plan and develop these experiments. From my experiments, this VFO tunes from 6.932 (with a bias of 0.69 v) to 7.067 MHz (with a bias of 2.22 v). However, at above a bias voltage of ~1.9 volts or so, Q1 is in saturation. If you reduce the 22K resistor connected to the tuning pot to 10K or less, this VFO will tune up to ~7.39 MHz, however stability, linearity and noise levels all are substantially degraded as the BJT will be deep in saturation. Clearly more bench work is needed to render this prototype more practical.
Photograph to the right: Another view of the prototype base bias tuned VFO experiment. The success of this VFO prompted further experimentation. What is most perplexing is how does changing the bias voltage affect the oscillator frequency? It is well known that a transistor has intrinsic or parasitic capacitance. This quality may allow the transistor to be used as as an inherent varactor. The BJT has 3 junctions; Base to Collector, Base to Emitter and Collector to Emitter. As you alter the base bias voltage with the 10K potentiometer, the bias on the other transistor junctions, transistor current and also the Collector to Emitter voltage changes.
I asked Doug, VE7DXK about what might be going on inside Q1 as one increases the base bias. Doug sent the following reply as well as a data sheet on the 2N3904 from Fairchild Semiconductors.
"I think that this circuit works because increasing IC effectively lowers the capacitance across the Collector-Emitter junction.. This can be seen in the attached data sheet. If you refer to the drawings which show rise and fall times (and a test circuit) you will see that they decrease with increased collector current. This is due to the capacitance changing across the emitter collector pins in the test circuit. In your case, as the bias is increased, IC increases and the capacitance goes down which results in an increase in the resonant frequency."
In effect, the CE junction is a variable capacitor in parallel with the other fixed value capacitors connected to the Q1 collector. In the case of this oscillator, changing the bias voltage alters the intrinsic capacitance of the CE junction of Q1 but unfortunately, also changes the operating point and oscillation amplitude. Generally it is undesirable to change the operating point and output voltage of a VFO during tuning, however, this experiment was designed to see if such a VFO might be practical in popcorn circuits and also to learn more about BJT oscillators.
Above schematic: Adapted test circuit from Fairchild Semiconductors. As it happened, I used Fairchild 2N3904s in these experiments which were purchased from Digi-Key.
40 Meter Band Receiver Project
A practical direct conversion receiver using a base bias tuned VFO was built.
Above left: Band Pass Filter and above right: schematic of front end band pass filter. This double tuned filter was specifically designed to use a 5 pF coupling cap and other common junk box capacitor values. The 3 dB bandwidth is ~ 400 KHz and the insertion loss was ~ 3.1 dB. A plot of this filter using a W7ZOI simulation program called GPLA (from the EMRFD CD) is shown on the supplemental page.
Above 2 photos: Two views of the filter. 28 gauge wire was used for the inductors as I did not have any 26 gauge magnet wire in stock.
Variable Frequency Oscillator
Above schematic: Considerable experimentation led to this evolved VFO schematic. Note a drafting error was spotted by Aren regarding R1. It is now correct. Big thanks to Aren ; http://home.hetnet.nl/~a.van.waarde/.
The optimal bias for frequency stability tends to be just below saturation, which is surprising to me. I cannot explain this. I adjusted "every" component including the collector voltage to try to optimize this VFO. Having the VC less than 4 volts gives the best combination of stability, tuning range and clean output from my simple bench testing.
This particular VFO starts going into saturation at ~ 1.9 VDC. If your R1 and R2 values are not correctly chosen, as you turn the 10K pot, the output voltage (and perhaps frequency) actually start dropping as the base bias voltage reaches saturation and this continues as you move into deeper saturation. I set R1 and R2 to prevent Q1 from going into saturation and to limit the tuning range. These values were found experimentally. I found that I must keep the bias below saturation as you tune for best results. When Q1 is below saturation, drift (measured in hertz) tends to be downward. Above saturation, it tended to drift upward. R1 and R2 also establish the lowest bias voltage. It was quite tedious to find this point as I had to change R1 and R2 values as well as the 27 pF capacitor value until I found a low band-edge frequency within the 40M band that did not result in a bias which put Q1 into saturation as the pot was turned through its range and the bias voltage was increased.
The saturation point and intrinsic capacitance of every transistor may be slightly different, so experimentation with this circuit is needed for optimal results.
You can tell when Q1 is saturated quite easily. Start with the 10K pot all the way to the left (pot is "off" and the bias voltage is set only by R2). As you turn the pot to the right, the frequency and output voltage will increase. If when continuing to turn the pot, the measured output voltage (and potentially the frequency) starts to drop, you have reached the saturation point. You need to increase R2 and then reanalyze. A relationship between R1, R2 and the capacitance connected to the Q1 collector (in my case the 220 pF plus 27 pF caps) will be found with experimentation. By adjusting these values, you should be able to set the lower band edge and have the VFO increase in frequency and amplitude throughout the range of the 10K pot (when turned from all the way left to all the way right).
Adjusting components such as the 330 ohm resistor connected to L1 can dramatically change the frequency and tuning range of this VFO. Any change which changes the bias current can change the tuning range, saturation voltage, band spread and output voltage of this VFO. This simple design is actually very complex! For example, I increased the Q1 emitter bypass capacitor from 100 to 150 ohms and the maximum tuning range dropped to only 6 KHz. [See feedback at the end of this webpage]
This is a "something for nothing" VFO, nothing more. From discussion with W7ZOI and VE7DXK, this oscillator may be part VFO and part "pulse generator "depending on the bias current. It is best to keep the maximal bias current low to keep the phase noise down. (optimally, you should probably use a bias voltage range from 0.7 to 1.5 VDC). I lack the knowledge and test equipment to further analyze this circuit but now better understand the relationship between collector current and frequency in a BJT oscillator.
Above left: Originally, the VFO was built to include 3 NP0 ceramic capacitors. These were later changed to multi-layer ceramic C0G types and oscillator drift was unchanged. The multilayer ceramics were cheaper for me and are more readily available and will be used in future oscillator projects instead of just NP0 ceramic types.
Above right: The L1 inductor was wound using 20 gauge wire to improve Q and also anchoring. The copper underneath was ground off outdoors using a motor tool . 6-32 bolts are used to strongly secure the VFO board to the chassis and prevent it from flexing or shifting. Rubber feet were affixed to the receiver chassis. The coil will be epoxy glued to the board on which it lies. All of these measures will hopefully help reduce frequency drift. One of the great virtues of this VFO is it frequency stability. After warm up, it drifts off frequency just a few hertz over 15-20 minutes.
To the right: The major draw back of using the base bias to tune a VFO is shown; the output voltage varies with bias current. Three sample measurements are shown as the tuning pot is turned from extreme left to right. Tuning was reasonably linear and frequency stability was surprisingly good for such a simple circuit. The VFO output was measured at the emitter of Q3. The output at the far right shows some signs of distortion.
Product Detector and Audio Chain
Drafting error on below schematic: fixed Dec 28, 2005. Another error was reported on Feb 15, 2005: the 5K6 resistor was labeled but not drawn. Thanks for all error reports - it makes the site better!
Above schematic: This EMRFD inspired audio chain includes a SBL-1 diode ring product detector, - 3dB attenuation pad, a diplexer from the KK7B binaural receiver from March 1999 QST, a W7EL classic common base AF preamp and a low noise op-amp headphone amplifier. I will not discuss this circuit in detail as this topic is well covered in EMRFD. I no longer use the LM386 as a headphone amp in any projects. The 5532 op-amp is far superior and gives amazing performance. The 3 dB pad after the product detector could be omitted and the complexity of the diplexer reduced. Low pass filtering could be easily added by adding another 5532 and some R and C values before the headphone amp. The 150 ohm output resistor reduces hiss.
Normally, a diode ring mixer/detector should be driven with a VFO signal voltage of +7 dBm. This was ignored and the VFO was connected to the LO input of the SBL-1 via a 51 ohm resistor (it is lower than 7 dBm). Omit this resistor if a conventional VFO buffer amp is used.
To the right: The blue and red 1.0 and 1.5 uF diplexer and 0.68 AF caps were metalized polypropylene types. Soldering an op-amp "ugly style" is not that easy, however with patience "its all good". The main receiver power switch is contained on the 10K volume pot.
Below 2 photos. External and internal views of the simple 40M band receiver. Shielded coaxial wire was eventually used to connect the VFO to the SBL-1. This VFO (like most) would likely work better with a low pass filter after it. I opted to not do this as the output voltage is already quite low and the insertion loss of a low pass filter might be significant. A common base VFO output amplifier with an integral 50 ohm attenuation pad was contemplated.
Conclusion
My thanks to W7ZOI and VE7DXK for their support.
I encourage you to build and experiment with VFO circuits. Although DDS VFOs are now popular and desirable, simple designs may provide rich learning opportunities and satisfaction.
Feedback
#:1 Email from W. Stienhour 20.01.2006 (QTH: Idaho, USA)
Note that [for the VFO] the inductor and the two capacitors in series; to ground form the oscillator's ser ies resonant circuit. The total C of the two series caps determines Fo for the circuit - changing either value changes the operating frequency - you're using the C-E capacitance shift to tune the oscillator. They also form a voltage divider from the collector/inductor junction to ground that sets the amount of feedback, collector to emitter. Thus, altering either value changes both Fo and the circuit gain. So when you increased the part of the capacitive voltage divider from emitter to ground from 100 to 150 pf you essentially restricted the range of the bias related capacitance change, relative to the emitter-ground capacitance. It also altered the ratio of the capacitances in the feedback path so amplifier gain was also changed. You can see that beta variations, transistor to transistor, which typically vary two-to-one and which set the circuits quiescent collector current would make reproducing it a pretty interesting task.
The signal at the collector is pretty huge compared to the current flowing in the emitter-base circuit (by the factor of the transistor's gain), hence the need for the capacitive voltage divider to inject just the right amount of signal at the emitter to sustain oscillation.
#2: Email from P. Gavrilovic (QTH: Texas USA)
A comment on phase shift of the feedback: you are using a common-base configuration, taking the output signal from the collector and feeding back
to the emitter, with the base at RF ground. In this topology there is no inversion between input and output signal and therefore no requirement to invert the phase around the feedback loop to meet zero phase shift for oscillation.
About the oscillation amplitude: to a good approximation, the peak-to-peak RF current is 4 times the emitter bias current. This comes about because during oscillation the emitter current flows for only part of the cycle and the fundamental component that is selected by the LC tank circuit is twice the DC bias. In order to find the voltage, the tank resistive load needs to be known so that you can multiply it by the current to get the voltage.
When you increase the base bias, this also increases the emitter current because the voltage drop across the emitter resistor goes up (Vbe is approximately constant at 0.65 V for forward bias). Therefore, the output voltage also increases.
Thanks for the feedback gentlemen! - 73, Todd
