Cascode BJT RF Amp Bias Experiments
Experiments were conducted to better understand small signal bipolar transistor biasing and gain. Biasing is in reality, choosing the correct DC currents and voltages at the transistor terminals to allow proper operation. DC biasing is used to establish the DC operating point or quiescent point (also called Q-point) and also determines the class of operation. The Q-point is usually set so that the AC output signal of a BJT amplifier is an amplified replica of the input AC signal and free of distortion. Many refer to this as linear transistor operation and this point will exist on a DC load line somewhere in the active region between transistor cutoff and saturation. A DC load line is a plot of the collector current against the voltage across the collector to emitter which few experimenters actually do.
I used to think that biasing a discrete transistor stage was a difficult procedure. Textbooks I read stated that setting the bias point required understanding transistor load lines and performing small signal analysis on the stage you wished to bias. The DC bias in reality, is dynamic and effected by many factors including the AC input signal strength and the relative impedances of the source signal and at the transistor input. With all this theory, one might become daunted and not wish to experiment with biasing one's own stages.
This web page presents some simple DC bias experiments that suggest that with some test equipment, ohm's law and some critical thinking, you might be able to bias your BJT stages without too much emphasis on theoretical knowledge.
Further reading about transistor theory is mandatory to really understand DC biasing. This web page presents over-simplified concepts but not lore. Definitions for terms such as cutoff and saturation are left for you to look up and write down in your notebook.
Cascode BJT RF Amplifier
The cascode topology was chosen for enhanced stability against oscillations and because no neutralization is required. Oscillations in a high gain, common emitter, tuned amplifier often occur because of resistance and capacitance differences between the transistor input and output. I learned that the internal capacitance between the collector and the base is most problematic. Energy from the output can flow through the transistor to the input and cause oscillations.
The cascode amplifier is a common emitter stage (Q1) directly coupled to a common base stage (Q2).The low impedance common base input of Q2 heavily loads the Q1 output which directly enhances stability against oscillations. This cascode stage also provides great input to output isolation. Unwanted signals that couple to the Q2 collector are bypassed to ground via a capacitor.
Shown in Figure 1 is the first experiment where a cascode amplifier is connected in a test circuit so that variable DC bias voltage could be applied to Q1. Q2 has a fixed bias. To calculate power gain, a -10 dB "pi" type resistor attenuator was connected to my source generator to provide a fixed output impedance. The signal generator output impedance was designed to very roughly match the input impedance of the Q1 amplifier. The bias was changed by adjusting the 10K potentiometer. The 2K2 resistor serves to AC decouple the potentiometer and also set the maximum bias voltage. It is essential. At incremental bias voltages from 0.2 to 5.0, a number of values were measured and the power gain was calculated.
These values will not be shown because this amplifier has considerable gain compression and distortion. I asked Wes, W7ZOI about this amplifier and he felt that the very high impedance presented to the Q2 collector 455 KHz IF transformer was likely problematic.
I had never worked with commercially fabricated, slug-tuned IF transformers before. The particular one I used was a first IF transformer with 50,000 ohm primary and 500 ohm secondary winding impedances. Three views of this IF can is shown in the Figure 1 schematic. This amplifier distorted the output with any Q1 emitter current greater >= 1-2 mA with a 5.1 mV input signal. With the input AC voltage increased to 10 mV, the output as shown in Figure 1 is clearly distorted. Measured and calculated values for an emitter current of 3.33 mA are shown at bottom right.
This Figure 1 amplifier is not well designed and should not be used.
Understanding Voltage Divider Biasing
Book tutorials regarding transistor biasing typically show many graphs and computations which can be intimidating. If you use voltage divider biasing, you can bias your own stages or analyze others' by using simple arithmetic and ohm's law. From my experiments and reading, I was able to determine 5 points to consider when setting the DC bias of a BJT stage.
The following points might be considered:
1. The resistance values of the base voltage divider greatly affect the stability of the circuit. In general, the lower the resistance of the base voltage divider, the more stable the circuit becomes. A lower resistance may reduce the transistor current gain due to reduced input impedance.
2. The base voltage divider configuration allows a wide range of resistor values to be used because the ratio of the 2 resistors determines the voltage developed and the resulting base current. That is providing you do not use resistor values that are too high to produce the required base current.
3. Increasing the value of the base to ground resistor value (R2 in Figure 2 ) increases transistor current.
4. Decreasing the value of the base to voltage supply (R1 in Figure 2) resistor increases transistor current.
5. The bias point or emitter current you chose for a given stage is also dependent on the AC signal analysis. The bias point is chosen so that the output signal is a boosted replica of the input signal. Some people call this the "active region". This AC theory is beyond the scope of this presentation and setting the DC bias is the intended focus of this web page.
Some of these points will be illustrated on this web page, however many of the experiments performed were left off. It is my hope that what is presented will help your general understanding of this topic and foremost; get you to build and measure on your own.
Shown in Figure 2 is the Voltage Divider Formula. The voltage divider formula may also be rearranged to solve for the correct bias resistors when you know the bias voltage you need. For example, pick an R2 value and arithmetically solve for R1. V can be calculated using ohm's law for a given emitter current or is measured and approximated from the experimental circuit. Nearest standard resistor values are typically used for R1 and R2.I learned in this series of experiments that ohm's law, a calculator, an oscilloscope and signal generator, and the above 5 considerations are all you really need to choose a DC bias point for a basic amplifier design.
Shown in Figure 3 is a graphic view of how increasing the base bias of a common emitter amp from 0.54 to 1.96 changed the collector current and output voltage. Base current, not voltage controls the collector current. The relationship between base current and collector current is called the dc-current transfer ratio or DC beta. Below 0.60 volts bias, this transistor is cut-off as no base-emitter current is flowing. At 0.60 bias, the internal voltage drop of the base-emitter diode is overcome and becomes forward biased allowing base current to flow. If you measure with your voltmeter, the base DC voltage is always ~ 0.6 volts more positive than the emitter of a transistor.
The cascode amplifier was experimentally stabilized 3 ways:
1. Emitter degeneration (series feedback) was added to Q1.
2. The primary coil tap on the 455 KHz IF transformer was not used.
3. A 12K swamping resistor was placed across the IF transformer.
This new experimental circuit is shown in Figure 4. A 0.1 uF capacitor was also added to better decouple any AC from the the DC bias voltage line. The regulated voltage is now 12.0 volts. A 47 ohm resistor was used to decouple the B+ from the amplifier because an earlier experiment using a 100 ohm resistor resulted in a large voltage drop across the resistor when higher current was used. This large voltage drop negatively affected the Q2 bias in particular.
A spreadsheet was printed to record the experimental values which included the Q1 bias, Q2 bias, Q1 emitter current, Q1 collector voltage and the AC voltage output on my oscilloscope.
The potentiometer was turned so that the voltage on the base of Q1 was 0.4 volts using my high impedance multimeter. The DC voltages were measured. I had a small wire soldered to the PC board with an alligator clip to ground the 220 ohm emitter resistor. For current measurement, the alligator clip was placed on 1 lead of the multimeter and the other lead was touched on the 220 ohm resistor to complete the circuit. Finally, the multimeter was set aside and the peak AC voltage was measured with my oscilloscope. The peak AC voltages were converted to RMS by multiplying by 0.707 and then squared and divided by the output resistance (510 ohms) so that the power was known. The gain was then calculated as:
Gain = 10 log (Output power / Input power)
Input power was constant at 0.000133 mW (5.1 mV squared / 196 ohms) This was repeated for each Q1 bias voltage as shown in the Figure 5 table.
Figure 5: Experiment 2 Data Table (right)
Shown in Figure 5 table are the measured DC values and the calculated gain from separate AC voltage measurements at each Q1 bias level. Note that no AC voltages are shown on this chart and power can't be calculated from the DC values shown. Q1 CV = the DC collector voltage of Q1.
Experiment 2 Analysis:
This was a fun experiment and I graphically saw in my oscilloscope how changing the Q1 bias caused this stage to go all the way from from cutoff into deep saturation. The most interesting observation was that there was little point in increasing the emitter current of Q1 above ~ 3-4 mA for typical class A operation. The stage power gain increased very little once the Q1 bias voltage was increased above ~1.6-2.0 volts in Experiment 2.
Shown above in Figure 6 is Experiment 3. The Experiment 2 circuit was modified so that Q1 has a fixed bias and Q2 has a variable bias by changing the value of the 10K potentiometer. I chose a set Q1 DC bias voltage of 2.59 volts; about mid-point in the Figure 6 table. Later on , I decreased the Q1 bias voltage in the interest of preserved linearity and reducing current draw. In addition to distortion free amplification, there are often many other factors to consider when deciding what bias voltage to pick for a transistor. They might include whether or not you need to run low current (for battery operation) how much gain you require and desired intermodulation distortion and/or dynamic range characteristics. To experimentally determine parameters such as intermodulation distortion, an advanced lab with a spectrum analyzer or a receiver set ups as a spectrum analyzer would be required .
Shown in Figure 7 are the measured values and calculated gain with Q1 in fixed bias and Q2 variable bias. The input pad was increased to 1594 ohms to more closely match the ~ 1K5 input impedance of the test amplifier. This raised the stage power gain almost 10 dB. The -15 dB pad was chosen as I had 3K9 and 2K2 resistors on hand and it provided an easy to build, well defined input impedance to calculate the input power. Although not shown in this table, I increased the Q2 bias all the way to ~ 8 volts DC in my experiment. At 5.82 volts and above, the output waveform in my oscilloscope was distorted. Clearly, Q2 should not be operated at or above this bias point with Q1 biased for 8.39 mA.
Experiment 3 Analysis:
The stage gain remains high until the Q2 base bias is dropped to the point where Q1 starts to go into saturation. At that point, Q1 begins to act like a resistance rather than a current source and signal is dissipated in the saturation resistance rather than being passed on through the cascode to the load. Eventually Q1 is totally saturated and the gain is lost. Maximum gain occurred at a Q2 bias voltage of 3.21 volts DC. Above this bias value , the Q1 emitter current was fixed at 8.39 mA. I learned from this experiment that a Q2 bias voltage of 3.21 volts DC was ideal.
Shown in Figure 8 is the experimental circuit breadboard.
Practical versions of this amp might have a fixed bias for both Q1 and Q2 or perhaps one transistor fixed bias and the other AGC controlled bias in an IF amp application. Many simple transistor radios use variable AGC voltage derived from the detector that is filtered and applied as negative or positive voltage (forward or reverse AGC) to change the base bias of the IF amplifiers in the receiver. I wanted a simple fixed bias version of the Experiment 2 and 3 amplifier for use in future projects.
Shown in Figure 9 is the fixed bias version of the RF amplifier.
I chose a Q1 bias of between 1.6-1.8 volts and a Q2 bias of ~3.21 for my amplifier. I chose ~1.6-1.8 volts for Q1 because of email and eQSO discussions with Doug, VE7DXK. Doug suggested that a smaller bias than I chose for Experiment 2 may be used because of the cascode configuration and the effect this has on the AC operation of Q1. Q2 was chosen as discussed previously.
The next step was to pick some resistor values for Q1 and Q2 to get my desired bias voltages.
Please refer to the formula in Figure 2. The first number to calculate is V. To calculate V we must first calculate the voltage drop across the 47 ohm resistor. We know from Figure 5, for 1.6 volts bias, the emitter current for the stage is 4.04 mA. We can use this number for our current. Using ohm's law, E = I x R, so 0.0044 amperes X 47 ohms = 0.02068 volts. B+ is 12.0 volts, so V = 12.0 - 0.2068 = 11. 79 volts.
For R2, I chose a 2200 ohm resistor based upon Point #2 of the 5 points to consider for voltage divider biasing as well as the fact as the 22 ohm emitter resistor used for series feedback will keep the input impedance relatively high even with R2 at 2200 ohms.
I did not want to do any hard math (it was 3 AM!), so I just chose a 10K resistance value for R1 and plugged it into the Figure 2 formula. VBias = (2200 ohms / 12200) X 11.79 volts. For a 10K resistance, VBias would be 2.13 volts. This is too high. I then repeated the same formula for a 12K and a 15K resistor, both of which are in my parts stock. For R1 = 12K, VBias = 1.83 volts. For R1 = 15K, VBias = 1.51 volts. The 12K value seemed to be perfect to obtain my desired Q1 bias of 1.6-1.8 volts. When I built the circuit, I measured the actual bias to be 1.71 volts. Pretty close to the calculated value. If you don't have a 2K2 for R2, try another value. It is not critical. The ratio of R1 to R2 determines the bias voltage.
You can also mathematically determine R1 by rearranging the Voltage Divider Formula. R1 = R2 x (V - VBias) / VBias
R2 = 2K2, V = 11.79 volts, VBias desired = 1.7 volts
Therefore: R1 = 2200 ohms x (11.79 volts - 1.7 volts) / 1.7 volts = 13058 ohms.
I chose a VBias of 1.7 volts as it was right in the center of my 1.6 -1.8 volts desired bias. A 12K resistor could be substituted for the 13K calculated R1 value. Mathematically solving for R1 is quicker as you only need to make 1 calculation and is strongly recommended.
It was decided to leave R1 at 10K and to vary the R2 values to set the desired Q2 bias of ~ 3.21 volts.
The formula to calculate R2 is as follows:
R2 = (VBias x R1) / (V - VBias)
R1 = 10000 ohms, VBias = 3.21 ohms, V = 11.79 volts
Therefore: R2 = (3.21 volts X 10000ohms) / (11.79 - 3.21volts) = 3741 ohms
A 3K9 resistor was used and VBias was measured to be 3.19 volts. The calculations should allow you to experimentally find the correct resistor values by providing a starting point. In some cases your current or voltages values will be off, but your calculations should be close to the actual circuit resistor values determined during building.
A clean output was observed on the scope with the Figure 9 amplifier under test conditions with various input voltages. I was quite satisfied with this stage and have built and tested it at 5.915 and 10.0 MHz as well as a wideband version for use in an active antenna.
To recap to this point. The Q1 and Q2 bias values for a cascode RF amp were determined by using a potentiometer to vary the DC bias while measuring the peak to peak voltage and observing the output waveform purity on my oscilloscope. Fixed bias resistor values were then calculated so that a fixed bias version of the amp could be built.
I realize now that Experiment 3 should have been performed with the Q1 bias set between 1.6 -1.8 volts to find the optimal bias voltage for Q2.
Shown in Figure 10 is a fixed Q1 and Q2 bias version using the "resistor chain bias" method which allows 1 of the 4 biasing resistors from Figure 9 to be dropped. You frequently see chains of biasing resistors used to bias differential amplifiers.
The Q1 and Q2 bias voltages are shown in black. Note how close they are to the Figure 9 bias values considering that standard value resistors are used. Choosing the resistors for a resistor bias chain is a little more tricky, but ohm's law makes it possible.
Bias Resistor Chain Calculations
Calculate the Q2 bias resistor values first. To allow practical resistors values for your chain, it is best to start with a higher value resistor for the R1 value of Q2. A 22K ohm resistor was selected. To drop the voltage to the desired ~3.21 solve for R2 using the formula:
R2 = (VBias x R1) / (V - VBias)
VBias = 3.21 volts, R1 = 22000 ohms and V = 11.79 volts
R2 = (3.21 volts x 22000 ohms) / (11.79 - 3.21 volts)
R2 = 8231 ohms
Your Q2 "R2" value must be divided once more to provide the proper Q1 bias. The bottom 2 resistors must add up to ~ 8231 ohms. The easiest thing I found was to pick a resistor value to go from the Q1 base to ground and work from there. I picked 4K7 ohms.
To find a resistor value for "R1" of Q1:
R1 = R2 x (V - VBias) / VBias
R1 = 4700 ohms x (3.21 - 1.7 volts) / 1.7 volts = 4175 ohms
From this calculation, the nearest standard value would be 3K9 ohms. 3900 + 4700 = 8600 ohms which more than the maximal 8231 ohms calculated, so I soldered in a 3K3 ohm resistor and measured Q1 at 1.67 volts bias and Q2 at 2.93 volts bias for a current draw of 4.33 mA. My calculations were not exact, but got me close to the target bias values and the amplifier works as designed. You can always try increasing or decreasing resistor values a bit and measuring with your multimeter to suit the resistor values you have on hand.
Experimentation With Variable Q1 Emitter Degeneration
Shown below in Figure 11 is a version of the cascode stage which has variable gain as the result of using a forward biased rectifier diode to provide user changeable series feedback to Q1. After finishing the biasing experiments, I wanted a means to vary the gain of this stage. I though about using this stage in an IF amplifier strip and AGC controlling the Q2 bias.
This would allow gain control but can trash the amplifier linearity when strong signals are present. I had some email and eQSO discussion with Doug, VE7DXK. He suggested trying variable emitter degeneration and the Figure 11 experiment was built based upon his advice. I was only able to achieve a gain variation of 22 dB which is not enough for an AGC controlled IF amp, but it did preserve signal purity as the 10K potentiometer was turned. This amp with a 22 dB gain variation would be acceptable for applications such as test equipment RF amplification. The fixed bias version is more versatile.
Shown above in Figure 12 is the Figure 10 circuit using a 2N3904 as the variable emitter resistance. Gain variation was similar to the diode.
I wish to thank Wes, W7ZOI and Doug, VE7DXK for answering my questions and providing suggestions for the many experiments I performed in March-April 2005.
Analysis of DC biasing may be performed by mathematical formula, transistor charts, experimentation and computer simulation. Actual biasing is relatively simple as this web page shows. Choosing the bias point for a BJT is where difficulty might lie, however, it is rarely critical and can be experimentally determined by the astute home builder in many cases.
- Ennes, Harold; Workshop In Solid State; Howard W. Sams; Indianapolis, IN; 1970
- Floyd, Thomas, Electronic Devices (2nd Edition); Macmillan Publishing Co. New York, NY; 1988
- Hayward, Campbell, and Larkin; Experimental Methods in RF Design; ARRL; 2003
- Hayward and DeMaw, Solid State Design For The Radio Amateur; ARRL; Second Printing, 1986
- Henderson, John; Electronic Devices-Concepts and Applications; Prentice-Hall, Englewood Cliffs, NJ; 1991
- Private email correspondence with W7ZOI and VE7DXK